Implementation of High Speed BCD Adder Designs Based on Majority Gates and Three-Input XOR
Majority-of-three (MAJ) gates may be realized natively by a variety of new ways. Although numerous MAJ gates can utilize upgraded gates there is directly derived from the physical qualities of new approaches, such as exclusive-OR (XOR) gates, is a very efficient XOR architecture. We covered three-input exclusive-OR multi-digit binary coded decimal (BCD) adder concepts (XOR3),square root carry choose binary adder, and MAJ gates in this short. Financial, commercial, and industrial computers use BCD adders.Using QCA technology, the designs were realized. The suggested logic representations achieve high speed, and the proposed architecture was generated and simulated using Verilog HDL in Xilinx ise.